In a package such as a flip chip Chip Scale Package (fcCSP), an integrated circuit (IC) or die is mounted to a substrate (e.g., a printed circuit board (PCB) or other integrated circuit carrier) through a bump on trace (BOT) interconnection. The BOT interconnection employs solder to electrically couple the bump of the IC to the trace of the substrate.
In light of the demand for ever smaller packages, attempts are often made to reduce the distance between adjacent bumps, which is known as the bump pitch. One way to reduce the bump pitch is by reducing the distance between neighboring metal traces.
Unfortunately, reducing the distance between neighboring metal traces may lead to undesirable or detrimental consequences. For example, if the neighboring metal traces are too close to each other, a solder bridge may form during reflow when the BOT interconnection is established.
Corresponding numerals and symbols in the different figures generally refer to corresponding parts unless otherwise indicated. The figures are drawn to clearly illustrate the relevant aspects of the embodiments and are not necessarily drawn to scale.